Delhi/NCR, India. Logic Fruit Technologies Pvt. Ltd, leading provider of IPs, Embedded Solutions, and product engineering services today announced the release of ARINC 818 IP Core. Designed to achieve advance performance into the data-intensive FPGAs with an added support to a variety of functionalities such as the Cockpit Display Systems (CDS), the Head-Up Display (HUD), and Video Recording. ARINC 818 IP is most suited to meet the high bandwidth requirement of aircraft display systems and support transmission rate of upto 4.25 Gbps.
ARINC 818 IP is an Avionics Digital Video Bus (ADVB) and is a high data rate video protocol simplified version of FC protocol with an emphasis given to cost reduction as well as speeding up the link initialization. Research and Development at Logic Fruit Technologies have enhanced its expertise through determination and passion to statistically design products that perform to set up the benchmarks at the global level. Something which has grown exponentially and is visible in the company’s product portfolio. ARINC 818 IP core is a video interface and protocol standard developed for high bandwidth, low latency digital video transmission. The IP is built on the Fiber Channel Audio Video (FC-AV defined in ANSI INCITS 356-2002) protocol which is used extensively on video systems in the F-18 and the C-130 AMP and various avionics with added advantage of standardized implementation. This IP core is CEMILAC certified and has a DO-254 DAL-B Compliant design.
Flexibility is one of the key characteristics of the IP core as it can be configured as a transmitter, as a receiver, or both transmitter and receiver in the same module. This IP core has support for both the progressive and the interlaced video formats with numerous other features built-in such as line-synchronous transmission, container header, and ancillary data monitoring which makes it well suited for high-end applications in the silicon ICs, aircraft, and satellite industry. Without making any changes in the RTL code, the same IP can be used with the Optical and the Electrical interfaces. Intrestingly, just as an extra cheese toppings on a pizza, the IP has a support for the user data along with the video data.
Sanjeev Kumar, the CEO of Logic Fruit Technologies said, “The modular architecture allows high-speed communication and workload accelerators, such as GPUs, FPGAs, and other purpose-built devices, to be easily integrated with any FPGA design and transceiver modules. The IP core is one of the best performing and power-efficient implementation of the ARINC protocol standard available in the market today.”
The ARINC 818 IP can be utilized with any Xilinx or Altera-based transceiver modules. These modules are known by different names in Xilinx depending on the FPGA used, such as work GTX, GTP, GTY, and so on. GX, GT, and so on are the Altera names for these modules. The key feature of a transceiver is clock and data recovery (CDR) and serial to parallel conversion (S2P) for the receiver side, and parallel to serial conversion (P2S) for the transmit side. As part of the deliverable, the ARINC818 Wrapper file for Kintex-7 FPGA will be available as an example prototype. This wrapper file will be customizable by users and can be used in their projects.